Overview VerilogVerse is an exciting hardware description and embedded design competition organized as part of Shaastra Elecfest, the annual tech fest vertical of IIT Madras. Designed for undergraduate students across Electrical Engineering, Computer Science, and related disciplines, the event challenges participants to design, implement, test, and optimize real-world digital systems directly on FPGA hardware.
Description: VerilogVerse is an embedded programming and hardware design competition conducted by Elecfest at Shaastra, IIT Madras. The competition evaluates participants' core competence in digital logic, hardware description languages, and efficient system implementation on FPGA development boards. Shortlisted participants advance from an online screening round to a high-intensity offline hardware implementation challenge. Get certified by an ISO 9001:2015-certified organization and showcase your RTL design skills at one of India's premier technical festivals.
Event Structure: The competition comprises two rounds: an online theoretical and coding assessment followed by a hands-on offline FPGA design challenge.
Round 1: A 90-minute online assessment comprising MCQs and numerical-answer questions, designed to evaluate participants' understanding of digital design and Verilog fundamentals.
Round 2: A 3-hour offline hardware implementation round where shortlisted teams implement Verilog modules on FPGA development boards to solve complex problem statements. Solutions are evaluated on functional correctness, hardware area utilization, and speed optimization.
Topics Covered: Verilog / SystemVerilog (HDL) Combinational and Sequential Logic Design Finite State Machines (FSMs) RTL Design & Architecture Static Timing Analysis FPGA Hardware Implementation & Area Optimization Note that the above list is not exhaustive. The list of topics is meant to give an idea of what to expect from the event and the areas it will focus on.
Guidelines: Intercollegiate and interdisciplinary team members are permitted. Teams can consist of 1 or 2 participants for Round 1. Individual participants who qualify from Round 1 are permitted to pair up with other qualified individuals before Round 2. A Shaastra passport must be purchased prior to attending the offline final round location.
Rules and Regulations: Participants must strictly adhere to all instructions provided by the event coordinators. A laptop is mandatory for both rounds and ensure a stable internet connection for Round 1. Calculators are permitted for both rounds. Tab switching, communication, or use of external assistance and AI tools will result in immediate disqualification Professional etiquette and proper communication protocols must be maintained at all times. In any situation involving disputes over solutions, submissions, or evaluations, the decision of the event coordinators shall be final. Participants are advised to regularly check the official Unstop page for schedules, updates, and announcements. Further instructions and logistical details will be communicated via dedicated participant groups established after registration.
Venue
Old IE Lab, Indian Institute of Technology Madras
Chennai, India